Most microprocessor-based computing devices, used to execute a variety of application programs, include a microprocessor and a separate memory (RAM) each residing in a separate package or "circuit chip" on a printed circuit motherboard. The memory stores and retrieves data in a matrix according to a predefined addressing scheme. The microprocessor typically accesses data stored in multi-bit words at various locations within the memory over corresponding multi-bit address lines. According to the addresses provided to the memory, data words are output over an output bus that is, in turn, interconnected with the microprocessor and with a variety of other data handling devices both on the board and remote from the board.
To facilitate assembly, maintenance and replacement of computing components, each circuit chip package is applied to a multi-pin socket that is, in turn, permanently mounted on the motherboard. One popular socket arrangement for accommodating random access memories is the so-called dual in-line memory module (DIMM) socket. This socket generally defines one hundred individual pin connections in a preferred arrangement. Each pin is at a standardized location on the socket and is designated by a standard "pin number." In general, the microprocessor, DIMM socket and other circuit components are connected by a series of discrete lines that are permanently placed on the motherboard, and that, consequently, are not reconfigurable. In other words, a particular pin of the microprocessor is permanently tied to a particular pin on the DIMM socket. This limits the ability of the dim socket to support memory devices other than those specifically designed to interface with certain interconnections or pins. However, the physical geometry of the dim socket is such that it can support several different types and sizes of memories. For example, the socket can accommodate the popular extended data out random access memory (EDO) available in a plurality of memory densities from 1 megabytes up to 32 or 64 megabytes. The addressing scheme for each of such devices is often slightly different. In particular, each different size, and array configuration (number of rows versus columns) requires more, less or different address pins to be employed. This means, that simply attaching different-sized memory into the same DIMM socket on a motherboard will not guarantee that the desired microprocessor address pins are connected with the proper addressing functions of the microprocessor. In particular, each EDO device may contain a different number of row versus column address pins. Some common configurations/sizes are detailed in the following table, which assumes one bank of memory per socket:
TOTAL MEMORY DEVICES SIZE (.times. 32) EMPLOYED REFRESH ROWS COLUMNS 1 Mbyte 256K .times. 4 512 9 9 1 MByte 256K .times. 16 512 9 9 1 MByte 256K .times. 16 1K 10 8 2 Mbyte 512K .times. 8 1K 10 9 4 Mbyte 1 Mbyte .times. 16 1K 10 10 4 Mbyte 1 Mbyte .times. 4 1K 10 10 8 Mbyte 2 Mbyte .times. 8 2K 11 10 16 Mbyte 4 Mbyte .times. 4 4K 12 10 16 MByte 4 Mbyte .times. 4 2K 11 11 16 Mbyte 4 Mbyte .times. 16 4K 12 10 32 Mbyte 8 Mbyte .times. 8 8K 13 10
Accordingly, it is an object of this invention to provide an apparatus and method for supporting a variety of different memory configurations and sizes within a single socket. The underlying architecture should be simple to configure for the different size memories. It should not require excessive amounts of additional software or hardware to enable the configuration.